SYQPA10-LR4

40Gbps QSFP 10km

传输速率:
40Gbps
波长:
传输距离:
10km
认证:
CE FCC ROHS
DDM:
YES
电源电压:
+3.3V
工作温度:
0~+70℃(商业级),-40~+85℃(工业级)
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咨询电话
+86-27-8700 1682
  • 产品描述
  • 产品应用

Description

 

This product is a 100Gb/s transceiver module designed for optical communication applications compliant to 100GBASE-LR4 of the IEEE P802.3ba standard. The module converts 4 input channels of 25Gb/s electrical data to 4 channels of LAN WDM optical signals and then multiplexes them into a single channel for 100Gb/s optical transmission. Reversely on the receiver side, the module de-multiplexes a 100Gb/s optical input into 4 channels of LAN WDM optical signals and then converts them to 4 output channels of electrical data.

The central wavelengths of the 4 LAN WDM channels are 1295.56, 1300.05, 1304.58 and 1309.14 nm as members of the LAN WDM wavelength grid defined in IEEE 802.3ba. The high performance cooled LAN WDM

 

DFB transmitters and high sensitivity PIN receivers provide superior performance for 100Gigabit Ethernet applications up to 10km links and compliant to optical interface with IEEE802.3ba Clause 88 100GBASE-LR4 requirements.

The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference.

 

 
 

 

最大额定参数

Absolute Maximum Ratings

 

Parameter

Symbol

Min

Max

Unit

Supply Voltage

Vcc

-0.3

3.6

V

Input Voltage

Vin

-0.3

Vcc+0.3

V

Storage Temperature

Tst

-20

85

ºC

Case Operating Temperature

Top

0

70

ºC

Humidity(non-condensing)

Rh

5

85

%

Damage Threshold, each Lane

TH

5.5

 

dBm

推荐工作条件

Recommended Operating Conditions

Parameter

Symbol

Min

Typical

Max

Unit

Supply Voltage

Vcc

3.13

3.3

3.47

V

Operating Case temperature

Tca

0

 

70

ºC

Data Rate Per Lane

fd

 

25.78125

 

Gbps

Humidity

Rh

5

 

85

%

Power Dissipation

P

 

 

3.5

W

Link Distance with G.652

D

0.002

 

10

km

 

光电特性

Electrical Specifications

Parameter

Symbol

Min

Typical

Max

Unit

Power Consumption

P

 

 

3.5

W

Supply Current

Icc

 

 

1.06

A

Transceiver Power-on Initialization Time

 

 

 

2000

ms

Transmitter(each Lane)

Single-ended Input Voltage Tolerance

 

 

-0.3

 

 

4.0

 

V

AC Common Mode Input Voltage Tolerance

 

 

15

 

 

 

mV

Differential Input Voltage

 

50

 

 

mVpp

Differential Input Voltage Swing

Vin

 

 

900

mVpp

Differential Input Impedance

Zin

90

100

110

Ohm

Receiver(each Lane)

Single-ended Output Voltage

 

-0.3

 

4.0

V

AC Common Mode Output Voltage

 

 

 

7.5

mV

Differential Output Voltage Swing

Vout

300

 

850

mVpp

Differential Output Impedance

Zout

90

100

110

Ohm

Note

Power-on Initialization Time is the time from when the power supply voltages reach and remain above the minimum recommended operating supply voltages to the time when the module is fully functional.

 

Optical Characteristics

 

 

QSFP28 100GBASE-LR4

Parameter

Symbol

Min

Typical

Max

Unit

Notes

 

 

Lane Wavelength

L0

1294.53

1295.56

1296.59

nm

 

L1

1299.02

1300.05

1301.09

nm

 

L2

1303.54

1304.58

1305.63

nm

 

L3

1308.09

1309.14

1310.19

nm

 

Transmitter

SMSR

SMSR

30

 

 

dB

 

Total Average Launch

PT

 

 

10.5

dBm

 

Average Launch Power, each Lane

 

PAVG

 

 

-4.3

 

 

 

4.5

 

 

dBm

 

OMA, each Lane

POMA

-1.3

 

4.5

dBm

1

Difference in Launch Power

Ptx,diff

 

 

5

dB

 

Launch Power in OMA

 

 

-2.3

 

 

 

dBm

 

TDP, each Lane

TDP

 

 

2.2

dB

 

 

Extinction Ratio

 

ER

 

4

 

 

 

dB

 

RIN20OMA

 

RIN

 

 

 

-130

dB/H

 

Optical Return Loss

TOL

 

 

20

dB

 

 

Transmitter Reflectance

RT

 

 

 

-12

 

dB

 

Eye Mask coordinates: X1, X2, X3, Y1, Y2, Y3

 

 

{0.25, 0.4, 0.45, 0.25, 0.28, 0.4}

 

 

2

Average Launch Power OFF

 

Poff

 

 

 

-30

 

dBm

 

Receiver

Damage Threshold, each Lane

 

 

THd

 

 

5.5

 

 

 

 

dBm

 

3

Total Average Receive

 

 

 

10.5

dBm

 

Average Receive Power, each Lane

 

 

 

-10.6

 

 

 

4.5

 

 

dBm

 

 

Receive Power (OMA), each Lane

 

 

 

 

 

4.5

 

 

dBm

 

Receiver Sensitivity (OMA), each Lane

 

 

SEN

 

 

 

 

-8.6

 

 

dBm

 

Stressed Receiver Sensitivity (OMA), each Lane

 

 

 

 

 

-6.8

 

 

dBm

 

4

Difference in Receive Power between any Two Lanes

(OMA)

 

 

 

 

Prx,diff

 

 

 

 

 

 

5.5

 

 

 

 

dB

 

LOS Assert

LOSA

 

-18

 

dBm

 

LOS Deassert

LOSD

 

-15

 

dBm

 

LOS Hysteresis

LOSH

0.5

 

 

dB

 

Receiver Electrical 3 dB upper Cutoff Frequency, each Lane

 

 

Fc

 

 

 

 

31

 

 

GHz

 

Conditions of Stress Receiver Sensitivity Test (Note 5)

Vertical Eye Closure Penalty, each Lane

 

 

 

1.8

 

 

 

dB

 

5

Stressed Eye J2 Jitter, each Lane

 

 

 

0.3

 

 

 

UI

 

Stressed Eye J9 Jitter, each Lane

 

 

 

0.47

 

 

 

UI

 

Note

    1. Even if the TDP < 1 dB, the OMA min must exceed the minimum value specified here.
    2. See Figure 4 below.
    3. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
    4. Measured with conformance test signal at receiver input for BER = 1x10-12Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.

 

 

 

 

 

 

 

 

 

 

DDM数字诊断存储器映射

The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.

Parameter

Symbol

Min

Max

Units

Notes

 

Temperature monitor absolute error

 

 

DMI_Temp

 

 

-3

 

 

+3

 

 

degC

 

Over operating temperature range

Supply voltage monitor absolute error

 

DMI _VCC

 

-0.1

 

0.1

 

V

Over full operating range

 

Channel RX power monitor absolute error

 

 

DMI_RX_Ch

 

 

-2

 

 

2

 

 

dB

 

 

1

Channel Bias current

monitor

 

DMI_Ibias_Ch

 

-10%

 

10%

 

mA

 

Channel TX power monitor

absolute error

 

DMI_TX_Ch

 

-2

 

2

 

dB

 

1

Notes:

1.  Due to measurement accuracy of different single mode fibers, there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.

 

引脚定义

Pin Descriptions

 

 

引脚描述

 

 

Pin

Logic

Symbol

Name/Description

Ref.

1

 

GND

Module Ground

1

2

CML-I

Tx2-

Transmitter inverted data input

 

3

CML-I

Tx2+

Transmitter non-inverted data input

 

4

 

GND

Module Ground

1

5

CML-I

Tx4-

Transmitter inverted data input

 

6

CML-I

Tx4+

Transmitter non-inverted data input

 

7

 

GND

Module Ground

1

8

LVTTL-I

MODSEIL

Module Select

2

9

LVTTL-I

ResetL

Module Reset

2

10

 

VCCRx

+3.3v Receiver Power Supply

 

11

LVCMOS-I

SCL

2-wire Serial interface clock

2

12

LVCMOS-I/O

SDA

2-wire Serial interface data

2

13

 

GND

Module Ground

1

14

CML-O

RX3+

Receiver non-inverted data output

 

15

CML-O

RX3-

Receiver inverted data output

 

16

 

GND

Module Ground

1

17

CML-O

RX1+

Receiver non-inverted data output

 

18

CML-O

RX1-

Receiver inverted data output

 

19

 

GND

Module Ground

1

20

 

GND

Module Ground

1

21

CML-O

RX2-

Receiver inverted data output

 

22

CML-O

RX2+

Receiver non-inverted data output

 

23

 

GND

Module Ground

1

24

CML-O

RX4-

Receiver inverted data output

 

25

CML-O

RX4+

Receiver non-inverted data output

 

26

 

GND

Module Ground

1

27

LVTTL-O

ModPrsL

Module Present, internal pulled down to GND

 

28

LVTTL-O

IntL

Interrupt output, should be pulled up on host board

2

29

 

VCCTx

+3.3v Transmitter Power Supply

 

30

 

VCC1

+3.3v Power Supply

 

31

LVTTL-I

LPMode

Low Power Mode

2

32

 

GND

Module Ground

1

33

CML-I

Tx3+

Transmitter non-inverted data input

 

34

CML-I

Tx3-

Transmitter inverted data input

 

35

 

GND

Module Ground

1

36

CML-I

Tx1+

Transmitter non-inverted data input

 

37

CML-I

Tx1-

Transmitter inverted data input

 

38

 

GND

Module Ground

1

Notes:

  1. Module circuit ground is isolated from module chassis ground within the module.
  2. Open collector; should be pulled up with 4.7k  10k ohms on host board to a voltage between 3.15Vand 3.6V.

 

推荐接口电路

Power Supply Filtering

 

The host board should use the power supply filtering shown in Figure3.

 

 

 

结构尺寸

Mechanical Dimensions

 

 

 

 

 

 

 

 

 

订购须知

Ordering information

Part Number

Product 

SYQPA10-LR4

100GE, QSFP28, 100GBASE-LR4, LAN_WDM 10km

 

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